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Product Name: integrated circuit IC AM3352BZCZA60 Model NO.: AM3352BZCZA60 Type: Digital / Analog IC Technics: Thick Film IC Integration: LSIC Conductive Type: Unipolar Integrated Circuit Application: Standard Generalized Integrated Circuit shape: SMD MFG.: TI D/C: 17+ Package: BGA-324 Quality: Genuine New Original Transport Package: Box HS Code: 8542390000 Product Description DescriptionAM3352BZCZA60:MPU AM335x RISC 32-Bit 600MHz 1.8V/3.3V 324-Pin NF-BGA Package: BGA-324Mfr. Part#: AM3352BZCZA60Mfr.: TIDatasheet:(e-mail or chat us for PDF file)ROHS Status:Quality: 100% OriginalWarranty: 180 daysThe AM335x microprocessors, based on the ARM Cortex-A8 processor, are enhanced with image, graphics processing, peripherals and industrial interface options such as EtherCAT and PROFIBUS. The devices support high-level operating systems (HLOS). Linux®and Android are available free of charge from TI.The AM335x microprocessor contain the subsystems shown in Figure 1-1 and a brief description of each follows:The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor and the PowerVR SGX Graphics Accelerator subsystem provides 3D graphics acceleration to support display and gaming effects.The Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS) is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.Key FeaturesUp to 1-GHz Sitara™ ARM®Cortex®-A8 32-BitRISC ProcessorNEON™ SIMD Coprocessor32KB of L1 Instruction and 32KB of Data CacheWith Single-Error Detection (Parity)256KB of L2 Cache With Error Correcting Code(ECC)176KB of On-Chip Boot ROM64KB of Dedicated RAMEmulation and Debug - JTAGInterrupt Controller (up to 128 InterruptRequests)On-Chip Memory (Shared L3 RAM)64KB of General-Purpose On-Chip MemoryController (OCMC) RAMAccessible to All MastersSupports Retention for Fast WakeupExternal Memory Interfaces (EMIF)mDDR(LPDDR), DDR2, DDR3, DDR3LController:mDDR: 200-MHz Clock (400-MHz DataRate)DDR2: 266-MHz Clock (532-MHz Data Rate)DDR3: 400-MHz Clock (800-MHz Data Rate)DDR3L: 400-MHz Clock (800-MHz DataRate)16-Bit Data Bus1GB of Total Addressable SpaceSupports One x16 or Two x8 Memory DeviceConfigurationsGeneral-Purpose Memory Controller (GPMC)Flexible 8-Bit and 16-Bit AsynchronousMemory Interface With up to Seven ChipSelects (NAND, NOR, Muxed-NOR, SRAM)Uses BCH Code to Support 4-, 8-, or 16-BitECCUses Hamming Code to Support 1-Bit ECCError Locator Module (ELM)Used in Conjunction With the GPMC toLocate Addresses of Data Errors fromSyndrome Polynomials Generated Using aBCH AlgorithmSupports 4-, 8-, and 16-Bit per 512-ByteBlock Error Location based on BCHAlgorithmsProgrammable Real-Time Unit Subsystem andIndustrial Communication Subsystem (PRU-ICSS)Supports Protocols such as EtherCAT®,PROFIBUS, PROFINET, EtherNet/IP™, andMoreTwo Programmable Real-Time Units (PRUs)32-Bit Load/Store RISC Processor Capableof Running at 200 MHz8KB of Instruction RAM With Single-ErrorDetection (Parity)8KB of Data RAM With Single-ErrorDetection (Parity)Single-Cycle 32-Bit Multiplier With 64-BitAccumulatorEnhanced GPIO Module Provides Shift-In/Out Support and Parallel Latch onExternal Signal12KB of Shared RAM With Single-ErrorDetection (Parity)Three 120-Byte Register Banks Accessible byEach PRUInterrupt Controller Module (INTC) for HandlingSystem Input EventsLocal Interconnect Bus for Connecting Internaland External Masters to the Resources Inside thePRU-ICSSPeripherals Inside the PRU-ICSS:One UART Port With Flow Control Pins,Supports up to 12 MbpsOne Enhanced Capture (eCAP) ModuleTwo MII Ethernet Ports that SupportIndustrial Ethernet, such as EtherCATOne MDIO PortPower, Reset, and Clock Management (PRCM)ModuleControls the Entry and Exit of Stand-By andDeep-Sleep ModesResponsible for Sleep Sequencing, PowerDomain Switch-Off Sequencing, Wake-UpSequencing, and Power Domain Switch-onSequencingClocksIntegrated 15- to 35-MHz High-FrequencyOscillator Used to Generate a ReferenceClock for Various System and PeripheralClocksSupports Individual Clock Enable andDisable Control for Subsystems andPeripherals to Facilitate Reduced PowerConsumptionFive ADPLLs to Generate System Clocks(MPU Subsystem, DDR Interface, USB andPeripherals [MMC and SD, UART, SPI, I2C],L3, L4, Ethernet, GFX [SGX530], LCD PixelClock)Why choosing usLocated in Shenzhen, the electronic market center of China.100% guarantee components quality: Genuine Original.Sufficient stock on your urgent demand.Sophisticated colleagues help you solve problems to reduce your risk with on-demand manufacturingFaster shipment: In stock components can ship the same day .24 Hours serviceNotice:Product images are for reference only.You can contact sales person to apply for abetter price.For more products, Pls do not hesitate to contact our Sales team.